Home | Projects | Notes > ARM Cortex-M3/M4 Processor > Analyzing Relocatable Object Files (.o)
main.o is in ELF format (Executable and Linkable Format)
ELF is a standard file format for object files and executable files when you use GCC
A file format standard describes a way of organizaing various elements (data, read-only data, code, uninitialized data, etc.) of a program in different sections.
Other file formats:
The Common Object File Format (COFF): Introduced by UNIX System V
ARM Image Format (AIF): Introduced by ARM
SRECORD: Introduced by Motorola
.o file mainly contains machine specific code and the data from the program. It does NOT contain any absolute addresses for data and code from the program. This is why it is called "relocatable".
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241main.o: file format elf32-littlearm
2
3
4Disassembly of section .text:
5
600000000 <main>:
7 0: b580 push {r7, lr}
8 2: af00 add r7, sp, #0
9 4: f7ff fffe bl 32e <enable_processor_faults>
10 8: 4807 ldr r0, [pc, #28] ; (28 <main+0x28>)
11 a: f7ff fffe bl 120 <init_scheduler_stack>
12 e: f7ff fffe bl 12a <init_tasks_stack>
13 12: f7ff fffe bl 0 <led_init_all>
14 16: f44f 707a mov.w r0, #1000 ; 0x3e8
15 1a: f7ff fffe bl b2 <init_systick_timer>
16 1e: f7ff fffe bl 314 <switch_sp_to_psp>
17 22: f7ff fffe bl 32 <task1_handler>
18 26: e7fe b.n 26 <main+0x26>
19 28: 2001ec00 .word 0x2001ec00
20
210000002c <idle_task>:
22 2c: b480 push {r7}
23 2e: af00 add r7, sp, #0
24 30: e7fe b.n 30 <idle_task+0x4>
As you can see above, every instruction is marked with "offset" to the relocatable section base address which will be determined by the linker. The relocatable section base address must be determined based on the hardware-specific information such as spec of your microcontroller, memory-map, etc.
In, every object file, every section's the base address is set to 00000000. This will be resolved to the absolute address by the linker (script).
Viewing a .o file using objdump tool
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181$ arm-none-eabi-objdump -h main.o
2
3main.o: file format elf32-littlearm
4
5Sections:
6Idx Name Size VMA LMA File off Algn
7 0 .text 000004ec 00000000 00000000 00000034 2**2
8 CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE
9 1 .data 00000001 00000000 00000000 00000520 2**0
10 CONTENTS, ALLOC, LOAD, DATA
11 2 .bss 00000054 00000000 00000000 00000524 2**2
12 ALLOC
13 3 .rodata 00000044 00000000 00000000 00000524 2**2
14 CONTENTS, ALLOC, LOAD, READONLY, DATA
15 4 .comment 00000034 00000000 00000000 00000568 2**0
16 CONTENTS, READONLY
17 5 .ARM.attributes 0000002e 00000000 00000000 0000059c 2**0
18 CONTENTS, READONLY
littlearm
means "little-endian", "arm"Important sections to remember:
.text
section holds the program codeSize is 0x4ec (1260) which is slightly over 1 KB
.data
section holds the data, especially the initialized data
.bss
section holds all uninitialized data
. rodata
section holds read-only data (constant data)
.comment
section contains some comments of metadata added by the compiler. Not very important at this point.Apart from these sections, you can add user-defined sections based on your needs.
Displaying assembler contents of executable sections:
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11$ arm-none-eabi-objdump -d main.o > main_log
This command helps us to understand a various assembly level instructions generated for all the functions of our program. (Disassembly)
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391// main_log
2
3main.o: file format elf32-littlearm
4
5
6Disassembly of section .text:
7
800000000 <main>:
9 0: b580 push {r7, lr}
10 2: af00 add r7, sp, #0
11 4: f7ff fffe bl 32e <enable_processor_faults>
12 8: 4807 ldr r0, [pc, #28] ; (28 <main+0x28>)
13 a: f7ff fffe bl 120 <init_scheduler_stack>
14 e: f7ff fffe bl 12a <init_tasks_stack>
15 12: f7ff fffe bl 0 <led_init_all>
16 16: f44f 707a mov.w r0, #1000 ; 0x3e8
17 1a: f7ff fffe bl b2 <init_systick_timer>
18 1e: f7ff fffe bl 314 <switch_sp_to_psp>
19 22: f7ff fffe bl 32 <task1_handler>
20 26: e7fe b.n 26 <main+0x26>
21 28: 2001ec00 .word 0x2001ec00
22
230000002c <idle_task>:
24 2c: b480 push {r7}
25 2e: af00 add r7, sp, #0
26 30: e7fe b.n 30 <idle_task+0x4>
27
2800000032 <task1_handler>:
29 32: b580 push {r7, lr}
30 34: af00 add r7, sp, #0
31 36: 200c movs r0, #12
32 38: f7ff fffe bl 0 <led_on>
33 3c: f44f 707a mov.w r0, #1000 ; 0x3e8
34 40: f7ff fffe bl 390 <task_delay>
35 44: 200c movs r0, #12
36 46: f7ff fffe bl 0 <led_off>
37 4a: f44f 707a mov.w r0, #1000 ; 0x3e8
38 4e: f7ff fffe bl 390 <task_delay>
39 52: e7f0 b.n 36 <task1_handler+0x4>
Displaying assembler contents of ALL sections:
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531$ arm-none-eabi-objdump -D main.o
2
3main.o: file format elf32-littlearm
4
5
6Disassembly of section .text:
7
800000000 <main>:
9 0: b580 push {r7, lr}
10 2: af00 add r7, sp, #0
11 4: f7ff fffe bl 32e <enable_processor_faults>
12 8: 4807 ldr r0, [pc, #28] ; (28 <main+0x28>)
13 a: f7ff fffe bl 120 <init_scheduler_stack>
14 e: f7ff fffe bl 12a <init_tasks_stack>
15 12: f7ff fffe bl 0 <led_init_all>
16 16: f44f 707a mov.w r0, #1000 ; 0x3e8
17 1a: f7ff fffe bl b2 <init_systick_timer>
18 1e: f7ff fffe bl 314 <switch_sp_to_psp>
19 22: f7ff fffe bl 32 <task1_handler>
20 26: e7fe b.n 26 <main+0x26>
21 28: 2001ec00 andcs lr, r1, r0, lsl #24
22
230000002c <idle_task>:
24 2c: b480 push {r7}
25 2e: af00 add r7, sp, #0
26 30: e7fe b.n 30 <idle_task+0x4>
27
28...
29
30Disassembly of section .data:
31
3200000000 <current_task>:
33 0: Address 0x0000000000000000 is out of bounds.
34
35
36Disassembly of section .bss:
37
3800000000 <g_tick_count>:
39 0: 00000000 andeq r0, r0, r0
40
4100000004 <user_tasks>:
42 ...
43
44Disassembly of section .rodata:
45
4600000000 <.rodata>:
47 0: 65637845 strbvs r7, [r3, #-2117]! ; 0xfffff7bb
48 4: 6f697470 svcvs 0x00697470
49 8: 48203a6e stmdami r0!, {r1, r2, r3, r5, r6, r9, fp, ip, sp}
50 c: 46647261 strbtmi r7, [r4], -r1, ror #4
51 10: 746c7561 strbtvc r7, [ip], #-1377 ; 0xfffffa9f
52 14: 00000000 andeq r0, r0, r0
53 18: 65637845 strbvs r7, [r3, #-2117]! ; 0xfffff7bb
Even includes
.data
,.bss
,.rodata
, etc.Do not dive deep into the assembly instructions appear at these data sections. They are just the results of disassembler trying to convert the machine code into the assembly instructions they can map, but they are not essentially instructions.
Displaying full contents of ALL sections requested:
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361$ arm-none-eabi-objdump -s main.o
2
3main.o: file format elf32-littlearm
4
5Contents of section .text:
6 0000 80b500af fff7feff 0748fff7 fefffff7 .........H......
7 0010 fefffff7 feff4ff4 7a70fff7 fefffff7 ......O.zp......
8 0020 fefffff7 fefffee7 00ec0120 80b400af ........... ....
9 0030 fee780b5 00af0c20 fff7feff 4ff47a70 ....... ....O.zp
10 0040 fff7feff 0c20fff7 feff4ff4 7a70fff7 ..... ....O.zp..
11 0050 fefff0e7 80b500af 0d20fff7 feff4ff4 ......... ....O.
12 0060 fa70fff7 feff0d20 fff7feff 4ff4fa70 .p..... ....O..p
13 ...
14 0490 80b582b0 00af084b 7b60fff7 fefffff7 .......K{`......
15 04a0 feff7b68 1b6843f0 80527b68 1a6000bf ..{h.hC..R{h.`..
16 04b0 0837bd46 80bd00bf 04ed00e0 80b500af .7.F............
17 04c0 0148fff7 fefffee7 00000000 80b500af .H..............
18 04d0 0148fff7 fefffee7 18000000 80b500af .H..............
19 04e0 0148fff7 fefffee7 30000000 .H......0...
20Contents of section .data:
21 0000 01 .
22Contents of section .rodata:
23 0000 45786365 7074696f 6e3a2048 61726446 Exception: HardF
24 0010 61756c74 00000000 45786365 7074696f ault....Exceptio
25 0020 6e3a204d 656d4d61 6e616765 00000000 n: MemManage....
26 0030 45786365 7074696f 6e3a2042 75734661 Exception: BusFa
27 0040 756c7400 ult.
28Contents of section .comment:
29 0000 00474343 3a202831 353a3130 2e332d32 .GCC: (15:10.3-2
30 0010 3032312e 30372d34 29203130 2e332e31 021.07-4) 10.3.1
31 0020 20323032 31303632 31202872 656c6561 20210621 (relea
32 0030 73652900 se).
33Contents of section .ARM.attributes:
34 0000 412d0000 00616561 62690001 23000000 A-...aeabi..#...
35 0010 0537452d 4d00060d 074d0902 12041401 .7E-M....M......
36 0020 15011703 18011901 1a011e06 2201 ............".
Nayak, K. (2022). Embedded Systems Programming on ARM Cortex-M3/M4 Processor [Video file]. Retrieved from https://www.udemy.com/course/embedded-system-programming-on-arm-cortex-m3m4/