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Memory Map

Memory Map of the MCU (STM32F4xx)

• STM32F4xx family MCU uses ARM Cortex-M4 processor.

• Width of the system bus: 32 bits

  • The processor can product 2³² different addresses (4 GB).

  • 0x0000_0000 ~ 0xFFFF_FFFF

• Each MCU peripheral is mapped to a subset of these addressable memory addresses.

  • e.g., When the processor produces 0x4002_0000 on the system bus, it is referring to the GPIO registers.

• Different types of MCUs have different memory maps but the fundamentals are the same. Consult the MCU reference manual for the MCU specific information.

• See also, https://kyungjae.com/notes/arm-cortex-m3-m4-processor/memory-map.

• Some important base addresses of peripheral registers:

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  22
  1
  /* Base adddress of AHB1 peripheral registers */
  2
  #define AHB1_BASE   0x40020000U
  3
  
  4
  /* Base adddress of GPIOA peripheral registers */
  5
  #define GPIOA_BASE  0x40020000U
  6
  
  7
  /* Base adddress of RCC engine registers of the MCU */
  8
  #define RCC_BASE    0x40023800U
  9
  
  10
  /* Base adddress of APB1 peripheral registers */
  11
  #define APB1_BASE   0x40000000U
  12
  
  13
  /* Base adddress of FLASH memory */
  14
  #define FLASH_BASE  0x40020000U
  15
  
  16
  /* Base adddress of SRAM1, SRAM2 */
  17
  #define SRAM1_BASE  0x20000000U
  18
  #define SRAM1_SIZE  (112 * 1024)    /* SRAM1: 112 KB, SRAM2: 16 KB */
  19
  #define SRAM2_BASE  ((SRAM1_BASE) + (SRAM1_SIZE))
  20
  
  21
  /* Base adddress of ADC1 peripheral registers */
  22
  #define ADC1_BASE   0x40012000U
  

  Make sure to find this information from the MCU reference manual.